From 5e8bc13794d3b8752babc33c19dd156669f39493 Mon Sep 17 00:00:00 2001 From: sneeker Date: Wed, 18 Mar 2020 12:00:00 +0000 Subject: [PATCH] implement protocol ast and instruction-selection examples --- examples/instructions-incomplete.tess | 9 +++++++++ examples/instructions.tess | 10 ++++++++++ 2 files changed, 19 insertions(+) create mode 100644 examples/instructions-incomplete.tess create mode 100644 examples/instructions.tess diff --git a/examples/instructions-incomplete.tess b/examples/instructions-incomplete.tess new file mode 100644 index 0000000..9ca14d0 --- /dev/null +++ b/examples/instructions-incomplete.tess @@ -0,0 +1,9 @@ +data Exp = Const Int | Reg Int | Plus Exp Exp | Times Exp Exp + +data Instr = LoadImm Int | LoadReg Int | AddInstr | MulInstr + +match select (e : Exp) : Instr = + | Plus (Reg a) (Reg b) -> AddInstr + | Times (Reg a) (Reg b) -> MulInstr + | Const n -> LoadImm n + | Reg n -> LoadReg n diff --git a/examples/instructions.tess b/examples/instructions.tess new file mode 100644 index 0000000..0d27f48 --- /dev/null +++ b/examples/instructions.tess @@ -0,0 +1,10 @@ +data Exp = Const Int | Reg Int | Plus Exp Exp | Times Exp Exp + +data Instr = LoadImm Int | LoadReg Int | AddInstr | MulInstr + +match select (e : Exp) : Instr = + | Plus (Reg a) (Reg b) -> AddInstr + | Times (Reg a) (Reg b) -> MulInstr + | Const n -> LoadImm n + | Reg n -> LoadReg n + | _ -> LoadImm 0